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High CMR, High Speed Optocouplers Technical Data
HCPL-4504 HCPL-J454 HCPL-0454 HCNW4504
Features
* Short Propagation Delays for TTL and IPM Applications * 15 kV/s Minimum Common Mode Transient Immunity at VCM = 1500 V for TTL/Load Drive * High CTR at TA = 25C >25% for HCPL-4504/0454 >23% for HCNW4504 >19% for HCPL-J454 * Electrical Specifications for Common IPM Applications * TTL Compatible * Guaranteed Performance from 0C to 70C * Open Collector Output * Safety Approval UL Recognized - 2500 V rms / 1min. for HCPL-4504/0454 - 3750 V rms / 1min. for HCPL-J454 - 5000 V rms / 1min. for HCPL-4504 Option020 and HCNW4504 CSA Approved VDE0884 Approved - VIORM = 560 Vpeak for HCPL-0454 Option060 - VIORM = 630 Vpeak for HCPL-4504 Option060
- VIORM = 891 Vpeak for HCPL-J454 - VIORM = 1414 Vpeak for HCNW4504
Applications
* Inverter Circuits and Intelligent Power Module (IPM) interfacing High Common Mode Transient Immunity (> 10 kV/s for an IPM load/drive) and (t PLH - tPHL) Specified (See Power Inverter Dead Time section) * Line Receivers Short Propagation Delays and Low Input-Output Capacitance * High Speed Logic Ground Isolation - TTL/TTL, TTL/ CMOS, TTL/LSTTL
* Replaces Pulse Transformers Save Board Space and Weight * Analog Signal Ground Isolation Integrated Photodetector Provides Improved Linearity over Phototransistors
Description
The HCPL-4504 and HCPL-0454 contain a GaAsP LED while the HCPL-J454 and HCNW4504 contain an AlGaAs LED. The LED is optically coupled to an integrated high gain photo detector. The HCPL-4504 series has short propagation delays and high CTR. The HCPL-4504 series also has a guaranteed propagation delay difference (tPLH-tPHL). These
Functional Diagram
NC 1 ANODE 2 CATHODE 3 NC 4 8 VCC 7 NC 6 VO 5 GND TRUTH TABLE LED VO ON OFF LOW HIGH
A 0.1 F bypass capacitor between pins 5 and 8 is recommended.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
2
features make the HCPL-4504 series an excellent solution to IPM inverter dead time and other switching problems. The CTR, propagation delay, and CMR are specified both for TTL and IPM conditions which are provided for ease of application. These single channel, diode-transistor optocouplers are available in 8-Pin DIP, SO-8, and Widebody
package configurations. An insulating layer between a LED and an integrated photodetector provide electrical insulation between input and output. Separate connections for the photodiode bias and outputtransistor collector increase the speed up to a hundred times that of a conventional phototransistor coupler by reducing the base collector capacitance.
Selection Guide
Package Type Part Number VDE0884 Approval Standard 8-Pin DIP (300 Mil) HCPL-4504 VIORM = 630 Vpeak (Option 060) White Mold 8-Pin DIP (300 Mil) HCPL-J454 VIORM = 891 Vpeak Widebody Small Outline SO8 (400 Mil) HCPL-0454 HCNW4504 VIORM = 560 Vpeak VIORM = 1414 Vpeak (Option 060)
Ordering Information
Specify Part number followed by Option Number (if desired) Example HCPL-4504 #XXX 020 = UL 5000 Vrms/1minute Option* for HCPL-4504 Only. 060 = VDE0884 Option* for HCPL-4504/0454. 300 = Gull-Wing Lead Option for HCPL-4504/J454, HCNW4504. 500 = Tape and Reel Packaging Option. Option data sheets available. Contact Agilent sales representative or authorized distributor for information.
*Combination of Option 020 and Option 060 is not available.
Schematic
ICC 8 VCC
+ ANODE 2 VF CATHODE - 3
IF
IO
6
VO
SHIELD
5
GND
3
Package Outline Drawings
HCPL-4504 Outline Drawing
9.65 0.25 (0.380 0.010) TYPE NUMBER 8 7 6 5 7.62 0.25 (0.300 0.010) 6.35 0.25 (0.250 0.010)
OPTION CODE* DATE CODE
A XXXXZ YYWW RU 1 1.19 (0.047) MAX. 2 3 4
UL RECOGNITION
1.78 (0.070) MAX. + 0.076 0.254 - 0.051 + 0.003) (0.010 - 0.002)
5 TYP. 4.70 (0.185) MAX.
0.51 (0.020) MIN. 2.92 (0.115) MIN. DIMENSIONS IN MILLIMETERS AND (INCHES). 1.080 0.320 (0.043 0.013) 0.65 (0.025) MAX. 2.54 0.25 (0.100 0.010) * MARKING CODE LETTER FOR OPTION NUMBERS (HCPL-4504 ONLY). "L" = OPTION 020 "V" = OPTION 060 OPTION NUMBERS 300 AND 500 NOT MARKED.
HCPL-4504 Gull Wing Surface Mount Option 300 Outline Drawing
PAD LOCATION (FOR REFERENCE ONLY) 9.65 0.25 (0.380 0.010)
8 7 6 5
1.016 (0.040) 1.194 (0.047)
4.826 TYP. (0.190) 6.350 0.25 (0.250 0.010) 9.398 (0.370) 9.906 (0.390)
1
2
3
4
1.194 (0.047) 1.778 (0.070) 1.780 (0.070) MAX. 9.65 0.25 (0.380 0.010) 7.62 0.25 (0.300 0.010)
0.381 (0.015) 0.635 (0.025)
1.19 (0.047) MAX.
4.19 MAX. (0.165)
+ 0.076 0.254 - 0.051 + 0.003) (0.010 - 0.002)
1.080 0.320 (0.043 0.013) 0.635 0.130 2.54 (0.025 0.005) (0.100) BSC DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
0.635 0.25 (0.025 0.010)
12 NOM.
4
Package Outline Drawings
HCPL-J454 Outline Drawing
9.80 0.25 (0.386 0.010) TYPE NUMBER 8 7 6 5 7.62 0.25 (0.300 0.010) 6.35 0.25 (0.250 0.010)
OPTION CODE* DATE CODE
A XXXXZ YYWW RU 1 1.19 (0.047) MAX. 2 3 4
UL RECOGNITION
1.78 (0.070) MAX. + 0.076 0.254 - 0.051 + 0.003) (0.010 - 0.002)
5 TYP. 4.70 (0.185) MAX.
0.51 (0.020) MIN. 2.92 (0.115) MIN. DIMENSIONS IN MILLIMETERS AND (INCHES). * MARKING CODE LETTER FOR OPTION NUMBERS (HCPL-4506). "L" = OPTION 020 "V" = OPTION 060 OPTION NUMBERS 300 AND 500 NOT MARKED.
1.080 0.320 (0.043 0.013)
0.65 (0.025) MAX. 2.54 0.25 (0.100 0.010)
HCPL-J454 Gull Wing Surface Mount Option 300 Outline Drawing
PAD LOCATION (FOR REFERENCE ONLY) 9.80 0.25 (0.386 0.010)
8 7 6 5
1.016 (0.040) 1.194 (0.047)
4.826 TYP. (0.190) 6.350 0.25 (0.250 0.010) 9.398 (0.370) 9.906 (0.390)
1
2
3
4
1.194 (0.047) 1.778 (0.070) 1.780 (0.070) MAX. 9.65 0.25 (0.380 0.010) 7.62 0.25 (0.300 0.010)
0.381 (0.015) 0.635 (0.025)
1.19 (0.047) MAX.
4.19 MAX. (0.165)
+ 0.076 0.254 - 0.051 + 0.003) (0.010 - 0.002)
1.080 0.320 (0.043 0.013) 0.635 0.130 2.54 (0.025 0.005) (0.100) BSC DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
0.635 0.25 (0.025 0.010)
12 NOM.
5
HCPL-0454 Outline Drawing (8-Pin Small Outline Package)
8
7
6
5
3.937 0.127 (0.155 0.005)
XXX YWW
5.994 0.203 (0.236 0.008) TYPE NUMBER (LAST 3 DIGITS) DATE CODE
4
PIN ONE 1 0.406 0.076 (0.016 0.003)
2
3
1.270 BSG (0.050) * 5.080 0.127 (0.200 0.005) 7 0.432 (0.017)
45 X
3.175 0.127 (0.125 0.005)
0 ~ 7 1.524 (0.060) 0.203 0.102 (0.008 0.004)
0.228 0.025 (0.009 0.001)
* TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH)
5.207 0.254 (0.205 0.010) DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES) MAX.
0.305 MIN. (0.012)
HCNW4504 Outline Drawing (8-Pin Widebody Package)
11.15 0.15 (0.442 0.006)
8 7 6 5
11.00 MAX. (0.433) 9.00 0.15 (0.354 0.006) TYPE NUMBER
A HCNWXXXX YYWW
DATE CODE
1
2
3
4
1.55 (0.061) MAX.
10.16 (0.400) TYP. 7 TYP. + 0.076 0.254 - 0.0051 + 0.003) (0.010 - 0.002) 5.10 MAX. (0.201)
3.10 (0.122) 3.90 (0.154) 2.54 (0.100) TYP. 1.78 0.15 (0.070 0.006) 0.40 (0.016) 0.56 (0.022)
0.51 (0.021) MIN.
DIMENSIONS IN MILLIMETERS (INCHES).
6
HCNW4504 Gull Wing Surface Mount Option 300 Outline Drawing
11.15 0.15 (0.442 0.006)
8 7 6 5
PAD LOCATION (FOR REFERENCE ONLY)
6.15 (0.242)TYP. 9.00 0.15 (0.354 0.006) 12.30 0.30 (0.484 0.012)
1 2 3 4
1.3 (0.051) 1.55 (0.061) MAX. 12.30 0.30 (0.484 0.012) 11.00 MAX. (0.433)
0.9 (0.035)
4.00 MAX. (0.158)
1.78 0.15 (0.070 0.006) 2.54 (0.100) BSC 0.75 0.25 (0.030 0.010)
1.00 0.15 (0.039 0.006)
+ 0.076 0.254 - 0.0051 + 0.003) (0.010 - 0.002) 7 NOM.
DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
Solder Reflow Temperature Profile (HCPL-0454 and Gull Wing Surface Mount Option Parts)
260 240 220 200 180 160 140 120 100 80 60 40 20 0 0 1 2 3 4 5 6 7 8 9 10 11 12 T = 145C, 1C/SEC T = 115C, 0.3C/SEC
TEMPERATURE - C
T = 100C, 1.5C/SEC
TIME - MINUTES
Note: Use of nonchlorine activated fluxes is highly recommended.
7
Regulatory Information
The devices contained in this data sheet have been approved by the following agencies: Agency/Standard Underwriters UL1577 Laboratories (UL) Recognized under UL1577, Component Recognition Program, Category FPQU2, File E55361 Canadian Component Standards Acceptance Association Notice #5 (CSA) File CA88324 Verband DIN VDE 0884 Deutscher (June 1992) Electrotechniker (VDE) Technischer DIN VDE 0884 Uberwachungs(June 1992) Verein Rheinland (TUV) Certificate R9650938 HCPL-4504 HCPL-J454 HCPL-0456 HCNW4504
8
Insulation and Safety Related Specifications
Parameter Minimum External Air Gap (External Clearance) Minimum External Tracking (External Creepage) Symbol L(101) Value Units Conditions HCPL-4504 HCPL-J454 HCPL-0454 HCNW4504 7.1 7.4 4.9 9.6 mm Measured from input terminals to output terminals, shortest distance through air. 7.4 8.0 4.8 10.0 mm Measured from input terminals to output terminals, shortest distance path along body. 0.08 0.5 0.08 1.0 mm Through insulation distance, conductor to conductor, usually the direct distance between the photoemitter and photodetector inside the optocoupler cavity. NA NA NA 4.0 mm Measured from input terminals to output terminals, along internal cavity. 175 175 175 200 Volts DIN IEC 112/VDE 0303 Part 1 IIIa IIIa IIIa IIIa Material Group (DIN VDE 0110, 1/89, Table 1)
L(102)
Minimum Internal Plastic Gap (Internal Clearance)
Minimum Internal Tracking (Internal Creepage) Tracking Resistance (Comparative Tracking Index) Isolation Group CTI
All Agilent data sheets report the creepage and clearance inherent to the optocoupler component itself. These dimensions are needed as a starting point for the equipment designer when determining the circuit insulation requirements. However, once mounted on a printed circuit board, minimum
creepage and clearance requirements must be met as specified for individual equipment standards. For creepage, the shortest distance path along the surface of a printed circuit board between the solder fillets of the input and output leads must be considered. There are recommended techniques such as grooves and
ribs which may be used on a printed circuit board to achieve desired creepage and clearances. Creepage and clearance distances will also change depending on factors such as pollution degree and insulation level.
9
VDE 0884 Insulation Related Characteristics
Description Symbol Installation classification per DIN VDE 0110/1.89, Table 1 for rated mains voltage 150 V rms for rated mains voltage 300 V rms for rated mains voltage 450 V rms for rated mains voltage 600 V rms for rated mains voltage 1000 V rms Climatic Classification Pollution Degree (DIN VDE 0110/1.89) Maximum Working Insulation Voltage VIORM Input to Output Test Voltage, Method b* VPR VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec, Partial Discharge < 5 pC Input to Output Test Voltage, Method a* VPR VIORM x 1.5 = VPR, Type and Sample Test, tm = 60 sec, Partial Discharge < 5 pC Highest Allowable Overvoltage* VIOTM (Transient Overvoltage, tini = 10 sec) Safety Limiting Values - Maximum Values Allowed in the Event of a Failure, also see Thermal Derating curve Case Temperature Input Current Output Power Insulation Resistance at TS, VIO = 500 V HCPL-0454 HCPL-4504 OPTION 060 OPTION 060 HCPL-J454 HCNW4504 Unit
I-IV I-III
I-IV I-IV I-III
I-IV I-IV I-III I-III 55/100/21 2 891 1670
55/100/21 2 560 1050
55/100/21 2 630 1181
I-IV I-IV I-IV I-IV I-III 55/85/21 2 1414 2652
V peak V peak
840
945
1336
2121
V peak
4000
6000
6000
8000
V peak
TS IS,INPUT PS,OUTPUT RS
150 150 600 109
175 230 600 109
175 400 600 109
150 400 700 109
C mA mW
*Refer to the optocoupler section of the Designer's Catalog, under regulatory information (VDE 0884) for a detailed description of Method a and Method b partial discharge test profiles.
NOTE: These optocouplers are suitable for "safe electrical isolation" only within the safety limit data. Maintenance of the safety data shall be ensured by means of protective circuits. NOTE: Insulation Characteristics are per DIN VDE 0884 (June 1992 revision). NOTE: Surface mount classification is Class A in accordance with CECC 00802.
10
Absolute Maximum Ratings
Parameter Storage Temperature Operating Temperature Symbol TS TA Min. -55 HCPL-4504 -55 HCPL-0454 HCPL-J454 HCNW4504 -55 HCPL-4504 HCPL-0454 HCPL-J454 HCNW4504 HCPL-4504 HCPL-0454 HCPL-J454 HCNW4504 HCPL-4504 HCPL-0454 HCPL-J454 HCNW4504 HCPL-4504 HCPL-0454 HCPL-J454 HCNW4504 Device Max. 125 100 Units C C Note
Average Forward Input Current Peak Forward Input Current (50% duty cycle, 1 ms pulse width)
IF(AVG) IF(PEAK)
85 25 50 40 1 0.1 5 3 45 40 8 16 30 20 100 260
mA mA
1 2
Peak Transient Input Current ( 1 s pulse width, 300 pps)
IF(TRANS)
A
Reverse LED Input Voltage (Pin 3-2)
VR
V
Input Power Dissipation
PIN
mW
3
Average Output Current (Pin 6) Peak Output Current Supply Voltage (Pin 8-5) Output Voltage (Pin 6-5) Output Power Dissipation Lead Solder Temperature (Through-Hole Parts Only) 1.6 mm below seating plane, 10 seconds Up to seating plane, 10 seconds Reflow Temperature Profile
IO(AVG) IO(PEAK) VCC VO PO TLS
-0.5 -0.5 HCPL-4504 HCPL-J454 HCNW4504
mA mA V V mW C
4
260 See Package Outline Drawings section
TRP
HCPL-0454 and Option 300
11
Electrical Specifications (DC)
Over recommended temperature (TA = 0C to 70C) unless otherwise specified. See note 12.
Parameter Current Transfer Ratio Symbol CTR Device HCPL-4504 HCPL-0454 HCPL-J454 HCNW4504 Current Transfer Ratio CTR HCPL-4504 HCPL-0454 HCPL-J454 HCNW4504 Logic Low Output Voltage VOL HCPL-4504 HCPL-0454 HCPL-J454 HCNW4504 Logic High Output Current Logic Low Supply Current IOH Min. 25 21 19 13 23 19 26 22 21 16 25 21 Typ.* 32 34 37 39 29 31 35 37 43 45 33 35 0.2 0.2 0.2 0.003 0.01 HCPL-4504 HCPL-0454 HCNW4504 HCPL-J454 50 Max. 60 60 60 63 65 65 65 68 0.4 0.5 0.4 0.5 0.4 0.5 0.5 1 50 200 Units Test Conditions % TA = 25C VO = 0.4 V IF = 16 mA, VO = 0.5 V VCC = 4.5 V TA = 25C VO = 0.4 V VO = 0.5 V TA = 25C VO = 0.4 V VO = 0.5 V % TA = 25C VO = 0.4 V IF = 12 mA, VO = 0.5 V VCC = 4.5 V TA = 25C VO = 0.4 V VO = 0.5 V TA = 25C VO = 0.4 V VO = 0.5 V V TA = 25C IO = 4.0 mA IF = 16 mA, IO = 3.3 mA VCC = 4.5 V TA = 25C IO = 3.6 mA IO = 3.0 mA TA = 25C IO = 3.6 mA IO = 3.0 mA A TA = 25C VO = VCC = 5.5 V IF = 0 mA TA = 25C VO = VCC = 15 V A IF = 16 mA, VO = Open, VCC = 15 V Fig. 1, 2, 4 Note 5
1, 2, 4
5
5
I CCL
12
Logic High Supply Current Input Forward Voltage
I CCH VF HCPL-4504 HCPL-0454 HCPL-J454 HCNW4504 HCPL-4504 HCPL-0454 HCPL-J454 HCNW4504 HCPL-4504 HCPL-0454 HCPL-J454 HCNW4504 HCPL-4504 HCPL-0454 HCPL-J454 HCNW4504
70 0.02 1.5 1.45 1.35 5 3 -1.6 -1.4 60 70 1.59
1 2 1.7 1.8 1.85 1.95
A V
TA = 25C IF = 0 mA, VO = Open, VCC = 15 V TA = 25C IF = 16 mA TA = 25C IF = 16 mA
12 3
Input Reverse Breakdown Voltage Temperature Coefficient of Forward Voltage Input Capacitance
BVR
V
IR = 10 A IR = 100 A
VF TA
mV/C IF = 16 mA
CIN
pF
f = 1 MHz, VF = 0 V
*All typicals at TA = 25C.
12
AC Switching Specifications
Over recommended temperature (TA = 0C to 70C) unless otherwise specified.
Parameter Propagation Delay Time to Logic Low at Output Symbol Device Min. tPHL Typ. Max. Units 0.2 0.2 0.3 s 0.5 TA = 25C Test Conditions Pulse: f = 20 kHz, Duty Cycle = 10%, IF = 16 mA, VCC = 5.0 V, RL = 1.9 k, CL = 15 pF, VTHHL = 1.5 V Fig. 6, 8, 9 Note 9
tPHL HCPLJ454 Others Propagation Delay Time to Logic High at Output tPLH
0.2 0.05 0.1
0.5
0.7 1.0
s
TA = 25C
Pulse: f = 10 kHz, 6, Duty Cycle = 50%, 10-14 IF = 12 mA, VCC = 15.0 V, RL = 20 k, C L = 100 pF, VTHHL = 1.5 V Pulse: f = 20 kHz, Duty Cycle = 10%, IF = 16 mA, VCC = 5.0 V, RL = 1.9 k, CL = 15 pF, VTHLH = 1.5 V 6, 8, 9
10
0.3 0.3
0.5 s 0.7
TA = 25C
9
tPLH
0.3 0.2
0.8 0.8
1.1 1.4
s
TA = 25C
Pulse: f = 10 kHz, 6, Duty Cycle = 50%, 10-14 IF = 12 mA, VCC = 15.0 V, RL = 20 k, C L = 100 pF, VTHLH = 2.0 V Pulse: f = 10 kHz, 6, Duty Cycle = 50%, 10-14 IF = 12 mA, VCC = 15.0 V, RL = 20 k, C L = 100 pF, VTHHL = 1.5 V, VTHLH = 2.0 V VCC = 5.0 V, RL = 1.9 k, CL = 15 pF, IF = 0 mA VCC = 15.0 V, RL = 20 k, CL = 100 pF, IF = 0 mA 7
10
Propagation Delay Difference Between Any 2 Parts Common Mode Transient Immunity at Logic High Level Output Common Mode Transient Immunity at Logic Low Level Output
tPLH -tPHL
-0.4 -0.7
0.3 0.3
0.9 1.3
s
TA = 25C
17
|CMH|
15
30
kV/s
TA = 25C VCM = 1500 VP-P
7, 9
|CMH|
15
30
kV/s
7
8, 10
|CML| HCPLJ454 Others |CML|
15
30
kV/s
TA = 25C VCM = 1500 VP-P
VCC = 5.0 V, RL = 1.9 k, CL = 15 pF, I F = 16 mA VCC = 15.0 V, RL = 20 k, CL = 100 pF, IF = 12 mA
7
7, 9
|CML|
15 10 15
30
kV/s
7
8, 10
30
kV/s
VCC = 15.0 V, RL = 20 k, CL = 100 pF, IF = 16 mA
7
8, 10
*All typicals at TA = 25C.
13
Package Characteristics
Over recommended temperature (TA = 0C to 25C) unless otherwise specified. Parameter
Input-Output Momentary Withstand Voltage
Sym.
VISO
Device
HCPL-4504 HCPL-0454
Min.
2500
Typ.*
Max.
Units
V rms
Test Conditions
RH 50%, t = 1 min., TA = 25C
Fig.
Note
6, 13, 16
HCPL-J454
HCPL-4504 Option 020 HCNW4504
3750
5000 5000
6, 14, 16
6, 11, 15 6, 15, 16
Input-Output Resistance
RI-O
HCPL-4504 HCPL-0454 HCPL-J454 HCNW4504 HCPL-4504 HCPL-0454 HCPL-J454 HCNW4504
1012
VI-O = 500 Vdc
6
1012 1011
1013 0.6 0.8 0.5 pF
Capacitance (Input-Output)
CI-O
TA = 25C TA = 100C f = 1 MHz
6
0.6
*All typicals at TA = 25C.. The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating refer to the VDE 0884 Insulation Related Characteristics Table (if applicable), your equipment level safety specification or Agilent Application Note 1074 entitled "Optocoupler Input-Output Endurance Voltage." Notes: 1. Derate linearly above 70C free-air temperature at a rate of 0.8 mA/C (8-Pin DIP). Derate linearly above 85C free-air temperature at a rate of 0.5 mA/C (SO-8). 2. Derate linearly above 70C free-air temperature at a rate of 1.6 mA/C (8-Pin DIP). Derate linearly above 85C free-air temperature at a rate of 1.0 mA/C (SO-8). 3. Derate linearly above 70C free-air temperature at a rate of 0.9 mW/C (8-Pin DIP). Derate linearly above 85C free-air temperature at a rate of 1.1 mW/C (SO-8). 4. Derate linearly above 70C free-air temperature at a rate of 2.0 mW/C (8-Pin DIP). Derate linearly above 85C free-air temperature at a rate of 2.3 mW/C (SO-8). 5. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, IO, to the forward LED input current, IF, times 100. 6. Device considered a two-terminal device: Pins 1, 2, 3, and 4 shorted together and Pins 5, 6, 7, and 8 shorted together. 7. Under TTL load and drive conditions: Common mode transient immunity in a Logic High level is the maximum tolerable (positive) dVCM /dt on the leading edge of the common mode pulse, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V). Common mode transient immunity in a Logic Low level is the maximum tolerable (negative) dVCM /dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a Logic Low state (i.e., VO < 0.8 V). 8. Under IPM (Intelligent Power Module) load and LED drive conditions: Common mode transient immunity in a Logic High level is the maximum tolerable dVCM /dt on the leading edge of the common mode pulse, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 3.0 V). Common mode transient immunity in a Logic Low level is the maximum tolerable dVCM /dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a Logic Low state (i.e., VO < 1.0 V). 9. The 1.9 k load represents 1 TTL unit load of 1.6 mA and the 5.6 k pull-up resistor. 10. The RL = 20 k, CL = 100 pF load represents an IPM (Intelligent Power Module) load. 11. See Option 020 data sheet for more information. 12. Use of a 0.1 F bypass capacitor connected between Pins 5 and 8 is recommended. 13. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage 3000 V rms for 1 second (leakage detection current limit, I i-o 5 A). 14. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage 4500 V rms for 1 second (leakage detection current limit, I i-o 5 A). 15. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage 6000 V rms for 1 second (leakage detection current limit, I i-o 5 A). 16. This test is performed before the 100% Production test shown in the VDE 0884 Insulation Related Characteristics Table, if applicable. 17. The difference between tPLH and tPHL between any two devices (same part number) under the same test condition. (See Power Inverter Dead Time and Propagation Delay Specifications section.)
14
HCPL-4504/0454 TA = 25C 10 VCC = 5.0 V 40 mA
HCPL-J454 25
IO - OUTPUT CURRENT - mA
HCNW4504 TA = 25C 20 VCC = 5.0 V 18 16 14 12 10 8 6 4 2 0 IF = 5 mA 0 10 VO - OUTPUT VOLTAGE - V 20
IO - OUTPUT CURRENT - mA
20
35 mA 30 mA 25 mA 20 mA
IO - OUTPUT CURRENT - mA
35 mA 30 mA 25 mA
TA = 25 C VCC = 5.0 V
40 mA
40 mA 35 mA 30 mA 25 mA 20 mA 15 mA 10 mA
15
5
20 mA 15 mA 10 mA IF = 5 mA
10
15 mA 10 mA
5
IF = 5 mA
0
0
10 VO - OUTPUT VOLTAGE - V
20
0
0
5
10
15
20
VO - OUTPUT VOLTAGE - V
Figure 1. DC and Pulsed Transfer Characteristics.
NORMALIZED CURRENT TRANSFER RATIO
NORMALIZED CURRENT TRANSFER RATIO
1.5
2.0 NORMALIZED IF = 16 mA VO = 0.4 V VCC = 5.0 V TA = 25 C
NORMALIZED CURRENT TRANSFER RATIO
HCPL-4504/0454
HCPL-J454
HCNW4504 2.0 1.6 1.2 0.8 0.4 0 NORMALIZED IF = 16 mA VO = 0.4 V VCC = 5.0 V TA = 25C
1.5
1.0
1.0
0.5
0.0
NORMALIZED IF = 16 mA VO = 0.4 V VCC = 5.0 V TA = 25C 0 2 4 6 8 10 12 14 16 18 20 22 24 26 IF - INPUT CURRENT - mA
0.5
0
0
5
10
15
20
25
0
5
10
15
20
25
IF - INPUT CURRENT - mA
IF - INPUT CURRENT - mA
Figure 2. Current Transfer Ratio vs. Input Current.
HCPL-4504/0454 1000 1000
HCPL-J454/HCNW4504
IF - FORWARD CURRENT - mA
100 10 1.0 0.1 0.01 0.001 1.1
IF - FORWARD CURRENT - mA
TA = 25C 100 10 1.0 0.1 0.01 0.001 1.2 IF + VF -
IF + VF -
TA = 25C
1.2
1.3
1.4
1.5
1.6
1.3
1.4
1.5
1.6
1.7
VF - FORWARD VOLTAGE - VOLTS
VF - FORWARD VOLTAGE - VOLTS
Figure 3. Input Current vs. Forward Voltage.
15
NORMALIZED CURRENT TRANSFER RATIO
NORMALIZED CURRENT TRANSFER RATIO
1.1 1.0
1.05 NORMALIZED IF = 16 mA VO = 0.4 V VCC = 5.0 V TA = 25 C
NORMALIZED CURRENT TRANSFER RATIO
HCPL-4504/0454
HCPL-J454
HCNW4504 1.05 NORMALIZED I F = 16 mA VO = 0.4 V VCC = 5.0 V TA = 25C
1.0
1.0
0.9 NORMALIZED I F = 16 mA VO = 0.4 V VCC = 5.0 V TA = 25C
0.95
0.95
0.8
0.7
0.9
0.9
0.6 -60 -40 -20 0
20 40 60 80 100 120
0.85 -60 -40 -20
0
20
40
60
80 100
0.85 -60 -40 -20 0
20 40 60 80 100 120
TA - TEMPERATURE - C
TA - TEMPERATURE - C
TA - TEMPERATURE - C
Figure 4. Current Transfer Ratio vs. Temperature.
IOH - LOGIC HIGH OUTPUT CURRENT - nA
10 4 10 3 10 2 10 1 10 0 10 -1 10-2 -60 -40 -20
IF = 0 mA VO = VCC = 5.0 V
0
20 40 60 80 100 120
TA - TEMPERATURE - C
Figure 5. Logic High Output Current vs. Temperature.
IF 0 VO VTHHL VCC
PULSE GEN. ZO = 50 t r = 5 ns
IF
1 2 3
8 7 6 0.1F 5 RL
VCC
VTHLH VOL I F MONITOR RM
VO
4
CL
t PHL
t PLH
Figure 6. Switching Test Circuit.
VCM 0V tr 10%
1 90% 90% 10% tf B A 3 4 VFF IF 2
8 7 6 0.1F 5 RL
VCC
VO
VO SWITCH AT A: IF = 0 mA VO SWITCH AT B: IF = 12 mA, 16 mA
VCC
CL VCM + - PULSE GEN.
VOL
Figure 7. Test Circuit for Transient Immunity and Typical Waveforms.
16
HCPL-4504/0454 0.50
HCPL-J454/HCNW4504 0.50
tp - PROPAGATION DELAY - s
tp - PROPAGATION DELAY - s
tp - PROPAGATION DELAY - s
VCC = 5.0 V 0.45 RL = 1.9 k CL = 15 pF 0.40 V THHL = VTHLH = 1.5 V 10% DUTY CYCLE 0.35 t PHL 0.30 0.25 0.20 0.15 0.10 -60 -40 -20 0 IF = 10 mA IF = 16 mA
tPLH
VCC = 5.0 V 0.45 RL = 1.9 k CL = 15 pF 0.40 V THHL = VTHLH = 1.5 V 10% DUTY CYCLE 0.35 0.30 t PHL 0.25 0.20 0.15 0.10 -60 -40 -20 0 IF = 10 mA IF = 16 mA
1.4 1.2
tPLH
VCC = 5.0 V TA = 25 C CL = 15 pF 1.0 VTHHL = VTHLH = 1.5 V 10% DUTY CYCLE 0.8 0.6 0.4 0.2 0.0 t PHL IF = 10 mA IF = 16 mA
tPLH
20 40 60 80 100 120
20 40 60 80 100 120
0
2
4
6
8 10 12 14 16 18 20
TA - TEMPERATURE - C
TA - TEMPERATURE - C
RL - LOAD RESISTANCE - k
Figure 8. Propagation Delay Time vs. Temperature.
Figure 9. Propagation Delay Time vs. Load Resistance.
HCPL-4504/0454
HCPL-J454/HCNW4504 1.1
tp - PROPAGATION DELAY - s
2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0
tp - PROPAGATION DELAY - s
tp - PROPAGATION DELAY - s
VCC = 5.0 V TA = 25 C CL = 100 pF VTHHL = 1.5 V VTHLH = 2.0 V 50% DUTY CYCLE t PLH IF = 10 mA IF = 16 mA
1.1
VCC = 15.0 V 1.0 RL = 20 k CL = 100 pF 0.9 V THHL = 1.5 V VTHLH = 2.0 V 0.8 0.7 0.6 0.5 tPHL 0.4 0.3 -60 -40 -20 0
IF = 10 mA IF = 16 mA t PLH
50% DUTY CYCLE
VCC = 15.0 V 1.0 RL = 20 k CL = 100 pF 0.9 VTHHL = 1.5 V VTHLH = 2.0 V 0.8 50% DUTY CYCLE 0.7 0.6 0.5 tPHL 0.4 0.3 -60 -40 -20 0
IF = 10 mA IF = 16 mA t PLH
t PHL
0
2
4
6
8 10 12 14 16 18 20
20 40 60 80 100 120
20 40 60 80 100 120
RL- LOAD RESISTANCE - k
TA - TEMPERATURE - C
TA - TEMPERATURE - C
Figure 10. Propagation Delay Time vs. Load Resistance.
Figure 11. Propagation Delay Time vs. Temperature.
17
1.8
tp - PROPAGATION DELAY - s
tp - PROPAGATION DELAY - s
tp - PROPAGATION DELAY - s
VCC = 15.0 V 1.6 TA = 25 C CL = 100 pF 1.4 VTHHL = 1.5 V 1.2 VTHLH = 2.0 V 50% DUTY CYCLE 1.0 0.8 0.6 0.4 0.2 0.0 0 IF = 10 mA IF = 16 mA t PHL
3.5
t PLH
VCC = 15.0 V = 25 C 3.0 TA RL = 20 k 2.5 VTHHL = 1.5 V VTHLH = 2.0 V 2.0 50% DUTY CYCLE 1.5 1.0 0.5 0.0
1.2
t PLH
1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 t PHL t PLH
TA = 25 C RL = 20 k CL = 100 pF VTHHL = 1.5 V VTHLH = 2.0 V 50% DUTY CYCLE
t PHL
IF = 10 mA IF = 16 mA
0 100 200 300 400 500 600 700 800 900 1000
IF = 10 mA IF = 16 mA
5 10 15 20 25 30 35 40 45 50 RL - LOAD RESISTANCE - k
0.2 10 11 12 13 14 15 16 17 18 19 20 VCC - SUPPLY VOLTAGE - V
CL - LOAD CAPACITANCE - pF
Figure 12. Propagation Delay Time vs. Load Resistance.
Figure 13. Propagation Delay Time vs. Load Capacitance.
Figure 14. Propagation Delay Time vs. Supply Voltage.
OUTPUT POWER - PS, INPUT CURRENT - IS
OUTPUT POWER - PS, INPUT CURRENT - IS
800 700 600 500 400 300 (230) 200 100 0 0
HCPL-4504 OPTION 060/HCPL-J454 PS (mW) IS (mA) for HCPL-4504 OPTION 060 IS (mA) for HCPL-J454
1000 900 800 700 600 500 400 300 200 (150) 100 0
HCPL-0454 OPTION 060/HCNW4504 PS (mW) for HCNW4504 IS (mA) for HCNW4504 PS (mW) for HCPL-0454 OPTION 060 IS (mA) for HCPL-0454 OPTION 060
25
50
75 100 125 150 175 200
0
25
50
75
100 125 150 175
TS - CASE TEMPERATURE - C
TS - CASE TEMPERATURE - C
Figure 15. Thermal Derating Curve, Dependence of Safety Limiting Valve with Case Temperature per VDE 0884.
+HV + HCPL-4504/0454/J454 8 HCNW4504 LED 1 2 7 6 3 OUT 1 5 BASE/GATE DRIVE CIRCUIT Q1
Power Inverter Dead Time and Propagation Delay Specifications
The HCPL-4504/0454/J454 and HCNW4504 include a specification intended to help designers minimize "dead time" in their power inverter designs. The new "propagation delay difference" specification (tPLH - tPHL) is useful for determining not only how much optocoupler switching delay is needed to prevent "shootthrough" current, but also for determining the best achievable worst-case dead time for a given design. When inverter power transistors switch (Q1 and Q2 in Figure 17), it is essential that they never conduct at the same time. Extremely large currents will flow if there is any overlap in their conduction during switching transitions, potentially damaging the transistors and even the surrounding circuitry. This "shootthrough" current is eliminated by delaying the turn-on of one transistor (Q2) long enough to ensure that the opposing transistor (Q1) has completely turned off. This delay introduces a small amount of "dead time" at the output of the inverter during which both transistors are off during switching transitions. Minimizing this dead time is an important design goal for an inverter designer. The amount of turn-on delay needed depends on the propagation delay characteristics of the optocoupler, as well as the characteristics of the transistor base/gate drive circuit. Considering only the delay characteristics of the optocoupler (the characteristics of the base/gate drive circuit can be analyzed in the
+ HCPL-4504/0454/J454 8 HCNW4504 LED 2 2 7 6 3 OUT 2 5 BASE/GATE DRIVE CIRCUIT Q2
-HV
Figure 16. Typical Power Inverter.
LED 1
OUT 1
tPLH min (tPLH max-tPLH min) tPLH max TURN-ON DELAY (tPLH max-tPLH min ) LED 2
OUT 2 tPHL min (tPHL max-tPHL min) tPHL max
MAXIMUM DEAD TIME
Figure 17. LED Delay and Dead Time Diagram.
18
same way), it is important to know the minimum and maximum turn-on (tPHL) and turnoff (tPLH) propagation delay specifications, preferably over the desired operating temperature range. The importance of these specifications is illustrated in Figure 17. The waveforms labeled "LED1", "LED2", "OUT1", and "OUT2" are the input and output voltages of the optocoupler circuits driving Q1 and Q2 respectively. Most inverters are designed such that the power transistor turns on when the optocoupler LED turns on; this ensures that both power transistors will be off in the event of a power loss in the control circuit. Inverters can also be designed such that the power transistor turns off when the optocoupler LED turns on; this type of design, however, requires additional fail-safe circuitry to turn off the power transistor if an over-current condition is detected. The timing illustrated in Figure 17 assumes that the power transistor turns on when the optocoupler LED turns on. The LED signal to turn on Q2 should be delayed enough so that an optocoupler with the very fastest turn-on propagation delay (tPHLmin) will never turn on before an optocoupler with the very slowest turn-off propagation delay (tPLHmax) turns off. To ensure this, the turn-on of the optocoupler should be delayed by an amount no less than (tPLHmax - tPHLmin), which also happens to be the
maximum data sheet value for the propagation delay difference specification, (tPLH - tPHL). The HCPL-4504/0454/J454 and HCNW4504 specify a maximum (tPLH - tPHL) of 1.3 s over an operating temperature range of 0-70C. Although (tPLH-tPHL)max tells the designer how much delay is needed to prevent shoot-through current, it is insufficient to tell the designer how much dead time a design will have. Assuming that the optocoupler turn-on delay is exactly equal to (t PLH - tPHL)max, the minimum dead time is zero (i.e., there is zero time between the turnoff of the very slowest optocoupler and the turn-on of the very fastest optocoupler). Calculating the maximum dead time is slightly more complicated. Assuming that the LED turn-on delay is still exactly equal to (tPLH - tPHL)max, it can be seen in Figure 17 that the maximum dead time is the sum of the maximum difference in turn-on delay plus the maximum difference in turnoff delay, [(tPLHmax-tPLHmin)+(tPHLmax-tPHLmin)]. This expression can be rearranged to obtain [(t PLHmax-tPHLmin)-(t PHLmin-tPHLmax)], and further rearranged to obtain [(tPLH-tPHL)max -(tPLH-tPHL)min],
which is the maximum minus the minimum data sheet values of (tPLH-tPHL). The difference between the maximum and minimum values depends directly on the total spread in propagation delays and sets the limit on how good the worst-case dead time can be for a given design. Therefore, optocouplers with tight propagation delay specifications (and not just shorter delays or lower pulse-width distortion) can achieve short dead times in power inverters. The HCPL-4504/0454/J454 and HCNW4504 specify a minimum (tPLH - tPHL) of -0.7 s over an operating temperature range of 0-70C, resulting in a maximum dead time of 2.0 s when the LED turn-on delay is equal to (tPLH-tPHL)max, or 1.3 s. It is important to maintain accurate LED turn-on delays because delays shorter than (tPLH - tPHL)max may allow shootthrough currents, while longer delays will increase the worst-case dead time.
www.agilent.com/semiconductors
For product information and a complete list of distributors, please go to our web site. For technical assistance call: Americas/Canada: +1 (800) 235-0312 or (408) 654-8675 Europe: +49 (0) 6441 92460 China: 10800 650 0017 Hong Kong: (+65) 6271 2451 India, Australia, New Zealand: (+65) 6271 2394 Japan: (+81 3) 3335-8152(Domestic/International), or 0120-61-1280(Domestic Only) Korea: (+65) 6271 2194 Malaysia, Singapore: (+65) 6271 2054 Taiwan: (+65) 6271 2654 Data subject to change. Copyright (c) 2003 Agilent Technologies, Inc. Obsoletes 5988-4106EN February 11, 2003 5988-8712EN

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